A question about cpp,gcc, and makefiles
While I shamefully admit I do not know much about Unix style compilation, I have a question
How do I organize a Makefile so that on 1 particular branch I get some C files preprocessed into a destination directory(d) without having to cope with # comments and -save-temps
[Edited by - vallentin on August 8, 2006 1:18:18 AM]
August 09, 2006 07:53 AM
Quote: Original post by vallentin
While I shamefully admit I do not know much about Unix style compilation, I have a question
How do I organize a Makefile so that on 1 particular branch I get some C files preprocessed into a destination directory(d) without having to cope with # comments and -save-temps
I am sure you might get some helpful answers if you could elaborate on what exactly you are trying to do (as well as WHY?).
While I am personally quite familiar with Makefiles, I am having issues understanding what it is that you are tying to achieve. So maybe you could provide some more details as well as possibly a short example?
Here's a simple make file that splits apart the preprocessing, compiling, and linking stages to their own rules for a file called "hello.c". Also, it uses grep to clean up (as it is now, it removes the preprocessor comments) the preprocessed source to output it as "hello.i_humanly_readable".
CC := gccCFLAGS := -DHELLOLIBS := all: hello hello.i_humanly_readablehello: hello.o $(CC) -o hello hello.o $(CFLAGS) $(LIBS)hello.o: hello.i $(CC) -o hello.o -c hello.i $(CFLAGS)hello.i_humanly_readable: hello.i grep --invert-match '^#' hello.i > hello.i_humanly_readablehello.i: hello.c $(CC) -o hello.i -E hello.c $(CFLAGS)
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