JoeJ said:
So, assuming programming remains a thing and we're not all replaced by AI bots
Ask ChatGTP how many “r”s there are in the word “Strawberry", and I think that fear will sort itself out :D
JoeJ said:
Ifaik, you currently generate native x86 instructions. But assuming we get many ARM devices, and maybe RISC-V in ten years or who knows what, i guess such native approach becomes more and more unpractical in the future.
Yes, exactly, I generate x86_64 instructions directly. I mean, I wouldn't mind if there was some level of abstraction for this kind of stuff, preferably on the CPU itself (so we don't have to rely on libraries to the specific compilations). But I have not enough experience with RISC-V and ARM to really judge that 🙂 I do dread the day I have to add another architecture though, that would take a long fucking time xD
JoeJ said:
I assume we could generate something like Clang LLVM byte code instead x86 instructions, then use Clang as a library to compile that to native?
That's also a possibility, yes. I personally prefer using less external tools/libraries, for no particular reason :D Even if it's really inefficient - I spent like 6 months on the last iteration of the x64-JIT which could have been spent somewhere else. I just enjoy dealing with those type of low-level problems, what can I say, that's why son I even write my own engine in the first place :D
JoeJ said:
But if we did this on client, with all software not just scripts, Chip designers could change their instruction sets with every generation, like currently happening with GPUs. Which might be very helpful to counteract the stagnation on shrinking transistors.
I mean, we kind of already have that, with microcode, only that it's more hidden away and specific. As you probably know, x86 is not actually what's being executed on those type of CPUs at all anymore. Stuff like “test rax; jcc 15” are already fused into one op; registers are renamed all over the places… so what you are proposing would kind of just be a common format that all chips share, which would then replace the current ASM-code for those chips, and there would still be an internal “micro-code” instruction set per processor/manufecturer that is actually executed on the CPU?