Rain dog:

Actually, multiplication is made in constant time. I don't remember the exact mechanics that the ALU units use at the moment (it's been 7 years since I took the course in computer architecture), but I can assure you that it's not a series of adds. I believe MUL is only 1 clock cycle on the x86 processors.

Division, however, is not constant time, as it is repeated until enough precision has been reached. The more precision you need the longer it takes.

If I were to implement a power-of operator, I think I would indeed go with x pow y, as it is easier to remember than x ** y. I already have a few operators like that (and, or, and xor) so it won't be difficult to implement.

Fruny:

You actually gave me the idea to allow the applications to dynamically register operators. It would then be possible to register operators like 'pow', 'cat', and 'mod', as needed. It is an interesting idea, but I don't think I'll implement it, I'm already trying to simplify the library. [wink]

[Edited by - WitchLord on April 10, 2005 10:08:50 AM]

Usage:  MUL     src        Modifies flags: CF OF (AF,PF,SF,ZF undefined)        Unsigned multiply of the accumulator by the source.  If "src" is        a byte value, then AL is used as the other multiplicand and the        result is placed in AX.  If "src" is a word value, then AX is        multiplied by "src" and DX:AX receives the result.  If "src" is        a double word value, then EAX is multiplied by "src" and EDX:EAX        receives the result.  The 386+ uses an early out algorithm which        makes multiplying any size value in EAX as fast as in the 8 or 16        bit registers.                                 Clocks                 Size        Operands         808x  286   386   486          Bytes        reg8            70-77   13   9-14  13-18          2        reg16          118-113  21   9-22  13-26          2        reg32             -     -    9-38  13-42         2-4        mem8        (76-83)+EA  16  12-17  13-18         2-4        mem16     (124-139)+EA  24  12-25  13-26         2-4        mem32             -     -   12-21  13-42         2-4        F6 /4 MUL r/m8 Unsigned multiply (AX ¬ AL * r/m8)        F7 /4 MUL r/m16 Unsigned multiply (DX:AX ¬ AX * r/m16)        F7 /4 MUL r/m32 Unsigned multiply (EDX:EAX ¬ EAX * r/m32)

That is taken from the MASM32 OPCODE help file.

Compared with ADD,

ADD - Arithmetic Addition        Usage:  ADD     dest,src        Modifies flags: AF CF OF PF SF ZF        Adds "src" to "dest" and replacing the original contents of "dest".        Both operands are binary.                                 Clocks                 Size        Operands         808x  286   386   486          Bytes        reg,reg           3     2     2     1             2        mem,reg         16+EA   7     7     3            2-4  (W88=24+EA)        reg,mem          9+EA   7     6     2            2-4  (W88=13+EA)        reg,immed         4     3     2     1            3-4        mem,immed       17+EA   7     7     3            3-6  (W88=23+EA)        accum,immed       4     3     2     1            2-3

It does appear that MUL is varying in clock cycles.

[Edited by - Rain Dog on April 9, 2005 4:14:27 PM]

I take back what I said. Thanks for showing me the truth! [smile]